/* ================================================================================ This program transmits an IR carrier signal by both odometer leds. Asuro repeatedly starts driving forward for 100 milliseconds and then stops for 100 milliseconds. Asuro stops to let the power supply voltage recover to its full value else the infrared receiver chip will not function. (This is a very voltage-level critical device) When Asuro is stopped, it will generate an infrared carrier signal that normally is transmitted by the infrared transmit diode left front on the Asuro. But this transmitter is diabled and the infrared carrier signal is now transmitted by both infrared odometer leds(!). If a user puts its hands above the Asuro, the infrared signal transmitted by the odometer ir-diodes will be received by the infrared receiver at left/front on the Asuro. As long as the infrared signal is received, Asiro will drive backwards. ================================================================================ */ // ================================================================================// // // Program : Asuro 018, Build 001, Asuro drives backwards when object is detected above.c // Release date : 2005-02-13 // Author : Henk van Winkoop // // Build : 001, 2005-02-13, original release // // ================================================================================ //-------------------------------------------------------------------------------- // INCLUDES //-------------------------------------------------------------------------------- #include "hvwdefines.h" //================================================================================ // DELAY MILLI SECONDS //================================================================================ void vDelayXMilliSeconds(int iDelMilSec){ //var unsigned int i,j; //handle all milli seconds for(i=0;i /256 = 31250.00Hz = 32us (counter max set to 0xFF) | //| 010 = 8MHz/ 8 = 1.000.000Hz => /256 = 3906.25Hz = 256us (counter max set to 0xFF) | //| 011 = 8MHz/ 64 = 125.000Hz => /256 = 488.28Hz = 2048us (counter max set to 0xFF) | //| 100 = 8MHz/ 256 = 31.250Hz => /256 = 122.07Hz = 8.192us (counter max set to 0xFF) | //| 101 = 8MHz/1024 = 7.813Hz => /256 = 30.52Hz = 32.768us (counter max set to 0xFF) | //| 110 = External clock source on T0 pin. Clock on falling edge | //| 111 = External clock source on T0 pin. Clock on rising edge | //| | //+-------------------------------------------------------------------------------------------+ //| user comment | //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+ //|bit number | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+ //|signal name| FOC2_X | WGM20_X | COM21_X | COM20_X | WGM21_X | CS22_X | CS21_X | CS20_X | //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+ SFRX ( TCCR2 , FOC2_L | WGM20_L | COM21_L | COM20_H | WGM21_H | CS22_L | CS21_L | CS20_H ); //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+ // 0 . . . . . . . = no forced-compare needed // . 0 . . 1 . . . = 10 = Clear Timer on Compare // . . 0 1 . . . . = 01 = Toggle OC2 on Compare Match // . . . . . 0 0 1 = 001 = 32us per count //+-------------------------------------------------------------------------------------------+ //+-------------------------------------------------------------------------------------------+ //| OCR2 = Output Compare Register Timer/Counter2 | //+-------------------------------------------------------------------------------------------+ //| | //+-------------------------------------------------------------------------------------------+ //| user comment | //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+ //|bit number | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+ SFRX ( OCR2 , 0x6E ); // 36kHz @8MHz //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+ //+-------------------------------------------------------------------------------------------+ //| TIMSK = Timer/Counter Interrupt Mask Register | //+-------------------------------------------------------------------------------------------+ //| | //| OCIE2 = timer/counter2, output-compare-match interrupt enable | //| TOIE2 = timer/counter2, overflow interrupt enable | //| TICIE1 = timer/counter1, input-capture interrupt enable | //| OCIE1A = timer/counter1, equal to output-compare-A-match register, interrupt enable | //| OCIE1B = timer/counter1, equal to output-compare-B-match register, interrupt enable | //| TOIE1 = timer/counter1 overflow interrupt enable | //| RESERVED = unused | //| TOIE0 = timer/counter0 overflow interrupt enable | //| | //+-------------------------------------------------------------------------------------------+ //| enable timer/counter0 interrupt | //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+ //| | Timer2 | Timer2 | Timer1 | Timer1 | Timer1 | Timer1 | - | Timer0 | //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+ //|bit number | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+ //|signal name| OCIE2_X | TOIE2_X |TICIE1_X |OCIE1A_X |OCIE1B_X | TOIE1_X |RESERVED | TOIE0_X | //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+ SFRX ( TIMSK , OCIE2_H | TOIE2_L |TICIE1_L |OCIE1A_L |OCIE1B_L | TOIE1_L |RESERVED | TOIE0_L ); //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+ // 1 . . . . . . . = 1 = timer/counter2 output-compare-match interrupt enable //+-------------------------------------------------------------------------------------------+ //+-------------------------------------------------------------------------------------------+ //| SREG = Status Register | //+-------------------------------------------------------------------------------------------+ //| | //| GIE = I = Global Interrupt Enable | //| BCS = T = Bit Copy Storage | //| HCF = H = Half Carry Flag | //| SB = S = Sign Bit | //| TCOF = V = Two's Complement Overflow Flag | //| GIE = I = Global Interrupt Enable | //| NF = N = Negative Flag | //| ZF = Z = Zero Flag | //| CF = C = Carry Flag | //| | //+-------------------------------------------------------------------------------------------+ //| programmer settings comment | //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+ //|bit number | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+ //| SREG | GIE_X | BCS_X | HCF_X | SB_X | TCOF_X | NF_X | ZF_X | CF_X | //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+ SFRX ( SREG , GIE_H ); //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+ // n . . . . . . . = 1 = global interrupt enable // . n . . . . . . = // . . n . . . . . = // . . . n . . . . = // . . . . n . . . = // . . . . . n . . = // . . . . . . n . = // . . . . . . . n = //+-------------------------------------------------------------------------------------------+ //enable both engines SFRX ( PORTB , SPD_RGT_H | SPD_LFT_H ) ; //endless loop while(1){ //switch both engines off for a while, else VCC too low for good ir-rx detection SFRX ( PORTB , SPD_LFT_L | SPD_RGT_L ) ; //switch infrared transmission on by enabling interrupt that generates ir-signal SFRX ( TIMSK , OCIE2_H ) ; //wait for ir-signal detected by ir-chip (takes about 200us) //wait for accu-voltage to recover to full value (100ms), else ir-chip will not function vDelayXMilliSeconds(100); //if infrared signal received from ir-chip if ( SFRQ ( PINRD , IR_RXD_L ) ) { //set both engines reverse SFRX ( PORTD , REV_LFT_L | FWD_LFT_H ) ; SFRX ( PORTB , REV_RGT_L | FWD_RGT_H ) ; } //if no infrared signal is received from ir-chip else{ //set both engines to forward SFRX ( PORTD , REV_LFT_H | FWD_LFT_L ) ; SFRX ( PORTB , REV_RGT_H | FWD_RGT_L ) ; } //switch infrared transmission off by disabling interrupt that generates ir-signal SFRX ( TIMSK , OCIE2_L ) ; //switch both engines on SFRX ( PORTB , SPD_LFT_H | SPD_RGT_H ) ; //let engines run on for a while vDelayXMilliSeconds(100); } //exit function return 0; } //================================================================================ // interrupt handler, timer/counter2 output compare // enable bit: register TIMSK bit OCIE2 // #define SIG_OUTPUT_COMPARE2 _VECTOR(3) //================================================================================ SIGNAL (SIG_OUTPUT_COMPARE2) { //toggle odo leds SFRT(PORTD,BOD_COM); }